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jfet input operational amplifiers these low cost jfet input operational amplifiers combine two stateoftheart analog technologies on a single monolithic integrated circuit. each internally compensated operational amplifier has well matched high voltage jfet input devices for low input offset voltage. the bifet technology provides wide bandwidths and fast slew rates with low input bias currents, input offset currents, and supply currents. the on semiconductor bifet family offers single, dual and quad operational amplifiers which are pincompatible with the industry standard mc1741, mc1458, and the mc3403/lm324 bipolar devices. the mc34001/ 34002/34004 series are specified from 0 to +70 c. ? input offset voltage options of 5.0 mv and 10 mv maximum ? low input bias current: 40 pa ? low input offset current: 10 pa ? wide gain bandwidth: 4.0 mhz ? high slew rate: 13 v/ m s ? low supply current: 1.4 ma per amplifier ? high input impedance: 10 12 w ? high common mode and supply voltage rejection ratios: 100 db ? industry standard pinouts ordering information op amp function device operating temperature range package single mc34001bd, d t =0 to+ 70 c so8 single mc34001bp, p t a = 0 to+ 70 c plastic dip dual mc34002bd, d t 0 to +70 c so8 dual mc34002bp, p t a = 0 to +70 c plastic dip quad mc34004bp, p t a = 0 to +70 c plastic dip on semiconductor ? semiconductor components industries, llc, 2002 march, 2002 rev. 2 1 publication order number: mc34001/d mc34001, b mc34002, b mc34004, b jfet input operational amplifiers nc v cc output offset null d suffix plastic package case 751 (so8) p suffix plastic package case 626 mc34001 (top view) pin connections mc34002 (top view) offset null noninv. input v ee inv. input v ee inputs a inputs b output b output a v cc 1 2 3 4 8 7 6 5 + - - + + 1 2 3 4 8 7 6 5 1 8 1 8 p suffix plastic package case 646 pin connections inputs 1 output 1 v cc inputs 2 output 2 output 4 inputs 4 v ee inputs 3 output 3 mc34004 (top view) 4 23 1 - 1 2 3 4 5 6 78 9 10 11 12 13 14 + - + + - + - 14 1
mc34001, b mc34002, b mc34004, b http://onsemi.com 2 maximum ratings rating symbol value unit supply voltage v cc , v ee 18 v differential input voltage (note 1) v id 30 v input voltage range v idr 16 v open short circuit duration t sc continuous operating ambient temperature range t a 0 to +70 c operating junction temperature t j 150 c storage temperature range t stg 65 to +150 c notes: 1. unless otherwise specified, the absolute maximum negative input voltage is equal to the negative power supply. electrical characteristics (v cc = +15 v, v ee = 15 v, t a = 25 c, unless otherwise noted.) characteristics symbol min typ max unit input offset voltage (r s 10 k) mc3400xb mc3400x v io e e 3.0 5.0 5.0 10 mv average temperature coefficient of input offset voltage r s 10 k, t a = t low to t high (note 2) d v io / d t e 10 e m v/ c input offset current (v cm = 0) (note 3) mc3400xb mc3400x i io e e 25 25 100 100 pa input bias current (v cm = 0) (note 3) mc3400xb mc3400x i ib e e 50 50 200 200 pa input resistance r i e 10 12 e w common mode input voltage range v icr 11 e +15 12 e e v large signal voltage gain (v o = 10 v, r l = 2.0 k) mc3400xb mc3400x a vol 50 25 150 100 e e v/mv output voltage swing (r l 10 k) (r l 2.0 k) v o 12 10 14 13 e e v common mode rejection ratio (r s 10 k) mc3400xb mc3400x cmrr 80 70 100 100 e e db supply voltage rejection ratio (r s 10 k) (note 4) mc3400xb mc3400x psrr 80 70 100 100 e e db supply current (each amplifier) mc3400xb mc3400x i d e e 1.4 1.4 2.5 2.7 ma slew rate (a v = 1.0) sr e 13 e v/ m s gainbandwidth product gbw e 4.0 e mhz equivalent input noise voltage (r s = 100 w , f = 1000 hz) e n e 25 e nv/ hz equivalent input noise current (f = 1000 hz) i n e 0.01 e pa/ hz notes: 2. t low =0 c for mc34001/34001b t high = +70 c for mc34001/34001b 0 c for mc34002 +70 c for mc34002 0 c for mc34004/34004b +70 c for mc34004/34004b 3. the input bias currents approximately double for every 10 c rise in junction temperature, t j . due to limited test time, the input bias currents are correlated to junction temperature. use of a heatsink is recommended if input bias current is to be kept to a minimum. 4. supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously, in accordance with common practice.
mc34001, b mc34002, b mc34004, b http://onsemi.com 3 electrical characteristics (v cc = +15 v, v ee = 15 v, t a = t low to t high [note 2].) characteristics symbol min typ max unit input offset voltage (r s 10 k) mc3400xb mc3400x v io e e e e 7.0 13 mv input offset current (v cm = 0) (note 3) mc3400xb mc3400x i io e e e e 4.0 4.0 na input bias current (v cm = 0) (note 3) mc3400xb mc3400x i ib e e e e 8.0 8.0 na common mode input voltage range v icr 11 e e v large signal (v o = 10 v, r l = 2.0 k) mc3400xb mc3400x a vol 25 15 e e e e v/mv output voltage swing (r 10 k) (r 2.0 k) v o 12 10 e e e e v common mode rejection ratio (r s 10 k) mc3400xb mc3400x cmrr 80 70 e e e e db supply voltage rejection ratio (r s 10 k) (note 4) mc3400xb mc3400x psrr 80 70 e e e e db supply current (each amplifier) mc3400xb mc3400x i d e e e e 2.8 3.0 ma notes: 2. t low =0 c for mc34001/34001b t high = +70 c for mc34001/34001b 0 c for mc34002 +70 c for mc34002 0 c for mc34004/34004b +70 c for mc34004/34004b 3. the input bias currents approximately double for every 10 c rise in junction temperature, t j . due to limited test time, the input bias currents are correlated to junction temperature. use of a heatsink is recommended if input bias current is to be kept to a minimum. 4. supply voltage rejection ratio is measured for both supply magnitudes increasing or decreasing simultaneously, in accordance with common practice.
mc34001, b mc34002, b mc34004, b http://onsemi.com 4 v cc /v ee = 15 v r l = 10 k r l = 2.0 k v cc /v ee = 15 v 5.0 v 10 v r l = 2.0 k t a = 25 c v o , output voltage swing (v pp ) v o , output voltage swing (v pp )v o , output voltage swing (v pp ) figure 1. input bias current versus temperature figure 2. output voltage swing versus frequency figure 3. output voltage swing versus load resistance figure 4. output voltage swing versus supply voltage figure 5. output voltage swing versus temperature figure 6. supply current per amplifier versus temperature t a , ambient temperature ( c) -75 -50 -25 0 25 50 75 100 125 v cc /v ee = 15 v 100 1.0 k 10 k 100 k 1.0 m 10 m f, frequency (hz) r l , load resistance (k w ) 0.1 0.2 0.4 0.7 1.0 2.0 10 4.0 7.0 v cc /v ee = 15 v t a = 25 c v cc /v ee , supply voltage (v) 0 5.0 10 15 20 r l = 2.0 k t a = 25 c t a , ambient temperature ( c) -50 -25 0 25 50 75 100 125 t a , ambient temperature ( c) -50 -25 0 25 50 75 100 125 v cc /v ee = 15 v i, supply drain current (ma) d 100 10 1.0 0.1 0.01 30 25 20 15 10 5.0 0 30 20 10 5.0 0 40 30 20 10 0 35 30 25 20 15 10 5.0 0 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0 40 35 , v o output voltage swing (v pp ) i ib , input bias current (na)
mc34001, b mc34002, b mc34004, b http://onsemi.com 5 figure 7. largesignal voltage gain and phase shift versus frequency figure 8. largesignal voltage gain versus temperature figure 9. normalized slew rate versus temperature figure 10. equivalent input noise voltage versus frequency figure 11. total harmonic distortion versus frequency f, frequency (hz) phase shift (degrees) 1.0 10 100 1.0 k 10 k 100 k 1.0 m 1.0 m 10 m a vol gain phase shift v cc /v ee = 15 v r l = 2.0 k t a = 25 c a, voltage gain (v/mv) vol v cc /v ee = 15 v v o = 10 v r l = 2.0 k t a , ambient temperature ( c) -50 -25 0 25 50 75 100 125 t a , ambient temperature ( c) normalized slew rate -50 -25 0 25 50 75 100 125 f, frequency (khz) e 0.01 0.05 0.1 0.5 1.0 5.0 10 50 100 n v cc /v ee = 15 v a v = 10 r s = 100 w t a = 25 c v cc /v ee = 15 vdc a v = 1.0 v o = 6.0 v (rms) t a = 25 c f, frequency (khz) thd, total harmonic distortion (%) 0.1 0.5 1.0 5.0 10 50 100 nv/ hz ) , open-loop gain , equivalent input noise voltage ( 10 6 10 5 10 4 10 3 10 1 10 2 1 1000 100 10 1.0 1.15 1.10 1.05 1.00 0.95 0.90 0.85 60 50 40 30 20 10 0 1.0 0.5 0.1 0.05 0.01 0.005 0.001 0 45 90 135 180
mc34001, b mc34002, b mc34004, b http://onsemi.com 6 figure 12. output current to voltage transformation for a dtoa converter representative circuit schematic (each amplifier) - + inputs q3 q4 q5 q2 q1 v cc q6 j1 j2 q17 q20 q23 24 j3 2.0 k q14 q15 10 pf q19 q21 q22 q24 q9 q8 q7 q25 q12 q10 q13 q11 q16 q18 1.5 k v ee bias circuitry common to all amplifiers offset null (mc34001 only) output 1.5 k v cc r1 v ref r2 v cc = 15 v v o 1 - + mc34001 v ee r o 15 pf d-to-a a1 a2 a3 a4 a5 a6 a7 a8 lsb c v ee = -15 v msb settling time to within 1/2 lsb is approximately 4.0 m s from the time all bits are switched (c = 68 pf). the value of c may be selected to minimize overshoot and ringing. theoretical v o v o = v ref r1 (r o ) a1 a2 a3 a4 a5 a6 a7 a8 2 4 8 16 32 64 128 256 ++++ ++ + i o
mc34001, b mc34002, b mc34004, b http://onsemi.com 7 figure 13. positive peak detector figure 14. long interval rc timer figure 15. isolating large capacitive loads figure 16. wide bw, low noise, low drift amplifier -10 v 10 v c2 r2 r1 c1 3 4 v ee v in v cc 6 2 7 f max 240 khz power bw: f max = s r 2 p vp 240 khz parasitic input capacitance (c1 3.0 pf plus any additional layout capacitance) interacts with feedback elements and creates undesirable high-frequency pole. to compensate add c2 such that: r2c2 r1c1. 8 0.5 0.02 c l = r2 5.1 k v o v cc r1 5.1 k 2 7 6 4 3 mc34001 v ee r l 5.1 k c l 0.5 m f c c r3 10 +2.0 v 0 d v o i o v/ m s = 0.04 v/ m s (with c l shown) d t - + overshoot 10% t s = 10 m s when driving large c l , the v o slew rate is determined by c l and i o(max) : = -2.0 v i o 8 v cc d1 2 3 - + 6 5 - + 7 reset v in 4 v ee 1/2 mc34002 1n914 1 m f * reset network or relay *polycarbonate capacitor d1 = hi-speed, low-reverse leakage diode v o mc34001 v r run r4 r1 v1 r3 2 7 +15 v mc34001 6 r6 -15 v clear c* r5 3 - + 4 *polycarbonate or polystyrene capacitor time (t) = r4 cn (v r /v r -v i ), r 3 = r 4 , r 5 = 0.1 r 6 if r1 = r2: t = 0.693 r4c design example: 100 second timer v r = 10 v c = l.0 m f r3 = r4 = 144 m r6 = 20 k r5 = 2.0 k r1 = r2 = 1.0 k r2 20 pf 1/2 mc34002
mc34001, b mc34002, b mc34004, b http://onsemi.com 8 p suffix plastic package case 62605 issue k d suffix plastic package case 75105 (so8) issue r outline dimensions notes: 1. dimension l to center of lead when formed parallel. 2. package contour optional (round or square corners). 3. dimensioning and tolerancing per ansi y14.5m, 1982. 14 5 8 f note 2 a b t seating plane h j g d k n c l m m a m 0.13 (0.005) b m t dim min max min max inches millimeters a 9.40 10.16 0.370 0.400 b 6.10 6.60 0.240 0.260 c 3.94 4.45 0.155 0.175 d 0.38 0.51 0.015 0.020 f 1.02 1.78 0.040 0.070 g 2.54 bsc 0.100 bsc h 0.76 1.27 0.030 0.050 j 0.20 0.30 0.008 0.012 k 2.92 3.43 0.115 0.135 l 7.62 bsc 0.300 bsc m --- 10 --- 10 n 0.76 1.01 0.030 0.040 seating plane 1 4 5 8 a 0.25 m cb ss 0.25 m b m h c x 45 l dim min max millimeters a 1.35 1.75 a1 0.10 0.25 b 0.35 0.49 c 0.18 0.25 d 4.80 5.00 e 1.27 bsc e 3.80 4.00 h 5.80 6.20 h 0 7 l 0.40 1.25 0.25 0.50 notes: 1. dimensioning and tolerancing per asme y14.5m, 1994. 2. dimensions are in millimeters. 3. dimension d and e do not include mold protrusion. 4. maximum mold protrusion 0.15 per side. 5. dimension b does not include mold protrusion. allowable dambar protrusion shall be 0.127 total in excess of the b dimension at maximum material condition. d e h a b e b a1 c a 0.10
mc34001, b mc34002, b mc34004, b http://onsemi.com 9 p suffix plastic package case 64606 issue l outline dimensions notes: 1. leads within 0.13 (0.005) radius of true position at seating plane at maximum material condition. 2. dimension l to center of leads when formed parallel. 3. dimension b does not include mold flash. 4. rounded corners optional. 17 14 8 b a f hg d k c n l j m seating plane dim min max min max millimeters inches a 0.715 0.770 18.16 19.56 b 0.240 0.260 6.10 6.60 c 0.145 0.185 3.69 4.69 d 0.015 0.021 0.38 0.53 f 0.040 0.070 1.02 1.78 g 0.100 bsc 2.54 bsc h 0.052 0.095 1.32 2.41 j 0.008 0.015 0.20 0.38 k 0.115 0.135 2.92 3.43 l 0.300 bsc 7.62 bsc m 0 10 0 10 n 0.015 0.039 0.39 1.01
mc34001, b mc34002, b mc34004, b http://onsemi.com 10 notes
mc34001, b mc34002, b mc34004, b http://onsemi.com 11 notes
mc34001, b mc34002, b mc34004, b http://onsemi.com 12 on semiconductor is a trademark and is a registered trademark of semiconductor components industries, llc (scillc). scillc reserves the right to make changes without further notice to any products herein. scillc makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does scillc assume any liability arising out of the application or use of any product or circui t, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. atypicalo parameters which may b e provided in scillc data sheets and/or specifications can and do vary in dif ferent applications and actual performance may vary over time. all operating parameters, including atypicalso must be validated for each customer application by customer's technical experts. scillc does not convey any license under its paten t rights nor the rights of others. scillc products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body , or other applications intended to support or sustain life, or for any other application in which the failure of the scillc product could create a sit uation where personal injury or death may occur. should buyer purchase or use scillc products for any such unintended or unauthorized application, buyer shall indem nify and hold scillc and its of ficers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and re asonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized u se, even if such claim alleges that scillc was negligent regarding the design or manufacture of the part. scillc is an equal opportunity/affirmative action employ er. publication ordering information japan : on semiconductor, japan customer focus center 4321 nishigotanda, shinagawaku, tokyo, japan 1410031 phone : 81357402700 email : r14525@onsemi.com on semiconductor website : http://onsemi.com for additional information, please contact your local sales representative. mc34001/d literature fulfillment : literature distribution center for on semiconductor p.o. box 5163, denver, colorado 80217 usa phone : 3036752175 or 8003443860 toll free usa/canada fax : 3036752176 or 8003443867 toll free usa/canada email : onlit@hibbertco.com n. american technical support : 8002829855 toll free usa/canada

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